Speaker
Description
Wire scanners are essential beam diagnostics at the Linac Coherent Light Source (LCLS), but distributed control software spanning EPICS device interfaces, timing buffers, beam profile analysis, and operator GUIs present reliability challenges. This work presents a catalog of design patterns implemented in the LCLS wire scanner application stack to improve operational reliability and failure visibility.
An append-only run registry records every scan attempt with full provenance and atomic writes, feeding a key parameter pipeline that tracks success rates, failure concentration by device, and wire coverage recency. Layered error propagation ensures exceptions are never silently swallowed, while defense-in-depth resource cleanup including try/finally blocks, context managers, and EPICS Channel Access cache purging prevents timing buffer leaks. Pre-flight validation enforces MPS speed limits before EPICS alarms and buffer lifecycle ordering before hardware actuation. Graceful degradation via NaN padding, per-device fault isolation, and analysis fallbacks maximizes useful output from partial scans. Dynamic timeouts scale with data volume and motor settle detection prevents premature data collection.
The patterns are implemented across a layered Python architecture with strict dependency hierarchy and are generalizable to other accelerator high-level applications.